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  rev 2.0 ?2010 advanced linear devices, inc. 415 tasman drive, sunnyvale, ca 94089-1706 tel: (408) 747-1155 fax: (408) 747-1286 www.aldinc.com a dvanced l inear d evices, i nc. single/dual cmos analog rc timer general description the ald7555/ALD7556 timers are high performance single/dual mono- lithic analog rc timing circuits. they offer significantly upgraded perfor- mance in speed, leakage currents, supply current, stability, temperature voltage stability, and discharge output drive when compared to se555/ ne555,icl7555, tlc555, and icm7555. the ald7555/ALD7556 offer the benefits of high input impedance, thereby allowing smaller timing capacitors and a longer timing cycle; high speed; low power dissipation for battery operated environment; reduced supply current spikes, allowing smaller and lower cost decoupling capacitors. each timer is capable of producing accurate time delays and oscillations in both monostable and astable operation, and operates in the one-shot (monostable) mode or 50% duty cycle free running oscillation mode with a single resistor r and one capacitor c. the inputs and outputs are fully compatible with cmos, nmos or ttl logic. there are three matched internal resistors (approximately 200k ? each) that set the threshold and trigger levels at two-thirds and one-third respec- tively of v + . these levels can be adjusted by using the control terminal. when the trigger input is below the trigger level, the output is in the high state and sourcing 2ma. when the threshold input is above the threshold level at the same time the trigger input is above the trigger level, the internal flip-flop is reset, the output goes to the low state and sinks up to 10ma. the reset input overrides all other inputs and when it is active (reset voltage less than 1v), the output is in the low state. the discarge output has been signifcantly enhanced to eliminate the need for a separate external driver. features ? improved accuracy and temperature stability ? high speed operation -- 2.5mhz typical oscillation at 5v ? high discharge sinking current of 80ma at 5v ? guaranteed low operating supply voltage of 2v to 10v ? functional equivalent to and same pin-out as ne555/ne556, se555, tlc555, icm7555/icm7556 ? greatly expanded high and low frequency ranges ? high speed, low power, monolithic cmos technology ? low supply current, typically: 50 a for ald7555, 100 a for ALD7556 ? extremely low trigger, threshold and reset currents 10pa typical ? operates in both monostable and astable modes ? fixed 50% duty cycle or adjustable duty cycle ? cmos, nmos and ttl compatible input/output ? low supply current spikes ? rail to rail output ? high speed one-shot (monostable) ? precision sequential timing ? long delay timer ? pulse width and pulse position modulation ? missing pulse detector ? frequency divider ? synchronized timer ald7555/ALD7556 benefits ? saves battery power ? eliminates additional buffer ? smaller, lower cost capacitor ? extended range of time constants applications block diagram (each timer) output (3) discharge (7) reset (4) r s r r r trigger (2) gnd (1) control (5) threshold (6) v + (8) * contact factory for leaded (non-rohs) or high temperature versions. operating temperature range * 0 c to +70 c0 c to +70 c -55 c to +125 c 8-pin small outline 8-pin plastic 8-pin cerdip package (soic) dip package package ald7555sal ald7555pal ald7555da 14-pin small outline 14-pin plastic 14-pin cerdip package (soic) dip package package ALD7556sbl ALD7556pbl ALD7556db ordering information (?l? suffix denotes lead-free (rohs)) pin configuration sal, pal, da packages 1 2 3 4 8 7 6 5 gnd trig out rst v + disc thres cont ald7555 sbl, pbl, db packages dsc 1 thres 1 cont 1 rst 1 out 1 trig 1 gnd trig 2 out 2 rst 2 cont 2 thres 2 dsc 2 v + 2 3 4 5 6 7 9 10 11 12 13 14 1 8 ALD7556
ald7555/ALD7556 advanced linear devices 2 of 12 absolute maximum ratings supply voltage, v + 13.2v input voltage range -0.3v to v + +0.3v power dissipation 600 mw operating temperature range sal, sbl, pal, pbl package 0 c to + 70 c da, db package -55 c to +125 c storage temperature range -65 c to +150 c lead temperature, 10 seconds +260 c operating electrical characteristics t a = 25 o c v + = +5v unless otherwise specified parameter symbol min typ max unit test conditions supply voltage v + 210 v supply current ald7555 i s 50 90 a outputs unloaded supply current ALD7556 i s 100 180 a timing error / astable mode t err 1.0 2.5 % c = 0.1 f initial accuracy drift with temperature 1 ? t/ ? t 10.0 ppm/ cr a = 1k ? drift with supply voltage 1 ? t/ ? v + 0.2 %/v r b = 1k ? threshold voltage v th 3.233 3.333 3.433 v trigger voltage v trig 1.567 1.667 1.767 v trigger current 2 i trig .01 0.4 na reset voltage v rst 0.4 0.7 1.0 v reset current 2 i rst .01 0.4 na threshold current 2 i th .01 0.4 na control voltage level v cont 3.200 3.333 3.467 v output voltage drop (low) v ol 0.2 0.4 v i sink = 10ma output voltage drop (high) v oh 4.2 4.6 v i source = -2ma rise time of output 1 t r 10 30 ns r l = 10m ? fall time of output 1 t f 10 30 ns c l = 10pf discharge transistor i dl .01 10 na leakage current discharge voltage drop v disc 0.5 1.0 v i discharge = 80ma 0.2 0.4 v i discharge = 30ma maximum frequency r a = 470 ? astable mode f max 1.0 2.5 mhz r b = 200 ? c t =100pf minimum trigger pulse width 1 t trig 50 100 ns notes: 1 sample tested parameters. 2 consists of junction leakage currents with strong temperature dependence.
ald7555/ALD7556 advanced linear devices 3 of 12 application notes general information the ald7555 and the ALD7556 devices are analog timers that are, in most situations, direct replacements or direct same pin-out upgrades for the icm7555, icm7556, ne/se555 and ne/se556 devices. significantly improved performances for the ald7555 and the ALD7556 include precision in timing, reduced leakage currents at all the pin terminals, faster switching speeds, reduced switching current spikes, en- hanced discharge output drive currents, better temperature stability, and better timing stability as a function of power supply. these improvements not only improve on the timer function, but also improve on many of the thousands of circuits that depend on this timer architecture, such as modulation cir- cuits, schmitt triggers, astable circuits, and myriads of mea- surement and control circuits where the user may have reached performance limits with their icm7555, icm7556, ne/se555 and ne/se556 devices. for a given design, one or more specification of the timer device may become the circuit performance limiting factor. the ald7555 and the ALD7556 devices are designed to address such limitations and in many cases offer a solution that is simpler and lower cost for a given design challenge than by other solutions by using other circuit means and techniques. architecture the ald7555 and the ALD7556 are analog timers that oper- ate based on the rc timing principle, using an external tim- ing resistor r and an external timing capacitor c. the c is charged by the r and then discharged via one of the two output pin connections provided by the ald7555 and the ALD7556. the control of the two outputs are provided by one of the 4 input pins. the inputs are named thresh- old, control, reset and trigger. threshold and trigger are connected to two separate voltage compara- tors with their respective comparator control levels set by an internal resistor string, consisting of three equal-valued and matched resistors. the output of the two comparators set an internal rs flip-flop circuit, which in turn controls an out- put and a discharge output. see block diagram for a simplified equivalent circuit. the output swings from rail to rail of the supply voltage, whereas the discharge only sinks current when it is active. the ald7555 and the ALD7556 operates by charging and discharging the rc timing between 1/3 and 2/3 v+, and by a feedback function provided by the user through the out- put and/or dischage pins. this feedback is provided by the application circuit external connections, which determines the mode of the circuit operation. the architecture of this timer takes advantage of the fact that all charging and dis- charging of c are referenced by the reference resistor string that provide reference voltages proportional to supply volt- age v+ (vdd). as the charging and the discharging of the capacitor c is also proportional to v+, the frequency of os- cillation is independent of v+ voltage levels. the three most basic modes of these external connections are shown as astable mode (free running mode), 50% duty cycle mode, and the monostable mode. see typical appli- cations. there are thousands of application circuits devel- oped that allow the user to manipulate this feedback func- tion, and which then produces many unique functions that is beyond a basic timer function. the application versatility of the ald7555 and the ALD7556 is only limited by the imagi- nation of the circuit designer. low power supply requirements the cmos process and the design of the ald7555 and the ALD7556 devices utilize three well-matched on-chip high impedance resistors to build the internal reference resistor string to provide very low power supply operation. another technique to achieve low power supply requirement is by using low power mosfet circuits on-chip, and by allowing the user to use a combination of off-chip timing resistor and capacitor that would reduce their power consumption as well. generally, this is accomplished by using higher values for r and lower values for c in a combination that would still pro- vide the timing required. furthermore, reduced on-chip leak- age currents improve on not only timing precision, but also greatly increased ranges of usable r and c values to gener- ate the same rc time constant. enhanced discharge output drive the discharge output drive currents of the ald7555 and the ALD7556 devices are increased significantly (80ma) when compared to other timers so that in many applications where the user may use this output as an output driver in- stead of having to add another output driver or buffer cir- cuitry. for example, in many situations, the discharge out- put drive current is sufficient to drive a relay or a power mosfet directly. astable operation ald7555 and the ALD7556 devices are designed to func- tion as astable oscillators. these timers can be connected to self trigger and run as a free running mutivibrator. in the free running oscillator mode, the external capacitor c is charged through ra and rb, and it is discharged through rb only. by adjusting the values of ra and rb in combination with the value of c, both the frequency and the duty cycle of the oscillator pulse can be adjusted. in the 50% astable mode, the charging and the discharging of c are performed by the same r between the same voltage levels set by the refer- ence resistor string, and therefore timer provide a true 50% duty cycle square wave that is symmetrical. (see typical applications)
ald7555/ALD7556 advanced linear devices 4 of 12 monostable operation in this mode of operation the ald7555 and the ALD7556 can be connected as a one-shot circuit which produces an output pulse with a user-adjustable pulse delay time. the pulse delay time is set by the external r and c values, which together produce a rc time constant that is proportional to the time delay. (see typical applications) the pulse is started with an external negative going trigger pulse applied to trig- ger pin. this negative going pulse set an internal flip-flop so that the external r and c can start the rc timing while the output pin is in the high state. the external c is being charged by the external r. when the voltage between the r and c is charged passed the internal threshold volt- age at the threshold pin, which is set at 66.6% of v+, the internal comparator of the ald7555 and the ALD7556 resets the internal flip-flop. this then turns on the discharge driver at discharge pin, and discharges the timing ca- pacitor c. the cycle is completed when the output is driven to a low state and the ald7555 and the ALD7556 are again waiting for the next negative going trigger pulse at trig- ger pin. control voltage and reset pins the control pin directly accesses one input to the upper comparator. as the input reference resistor string has on- chip high impedance resistors, an input voltage at the con- trol input can easily change the voltage at the comparator input. this allows the user to change the oscillation fre- quency, or modulate the oscillation frequency of the analog timer, with a separate user provided frequency. the con- trol pin also allows a user-provided inhibit signal to stop and start the timers oscillation. the reset terminal directly resets the internal rs flip-flop circuit, which in turn controls the output and discharge pins. this function is activated by a low voltage input of 0.7v of 100 ns minimum duration. by injecting a variety of input signals in a combination to the trigger , threshold, control and reset pins, many interesting modulation and demodulation signals can be manipulated and/or gen- erated by the circuit designer. application notes (cont?d)
ald7555/ALD7556 advanced linear devices 5 of 12 typical performance characteristics time delay in the monostable mode as a function of r a and c time delay 100ns 1 s 1ms 1s 10s capacitance 1g ? 10m ? 100m ? 1m ? 100k ? 10k ? 1k ? 10 mf 100 nf 1 mf 100 f 10 f 1 f 10 nf 1 nf 100 pf t a = 25 c 10 s 100 s 10ms 100ms 100s r a supply current as a function of supply voltage 0 2 4 6 8 10 12 100 60 50 40 30 20 10 0 70 80 90 t a = + 85 c t a = + 20 c t a = - 40 c supply voltage (v) supply current ( a) frequency change in the astable mode as a function of supply voltage supply voltage (v) 0 24 6 12 10 8 +4 +3 +2 +1 0 -1 -2 -3 frequency change (%) -4 free running frequency as a function of r a , r b and c frequency (hz) 1.0 1k 10k 100k 10m 100m 1m 10 mf 100 nf capacitance 1 mf 100 f 10 f 1 f 10 nf 1 nf 100 pf 10 0.1 100 ( r a - 2r b ) ta = 25 c 100m ? 10m ? 1m ? 100k ? 10k ? 1k ? discharge sink current (ma) discharge output sink current as a function of discharge low voltage discharge low voltage (v) 0.01 0.02 0.05 0.1 1.0 0.5 0.2 100 50 20 5.0 2.0 1.0 0.5 0.2 0.1 10 t a = 25 c v + = 5v v + = 12v v + = 2v 0 10 20 30 40 minimum pulse width required for triggering 800 600 500 400 300 200 100 0 700 lowest voltage level of trigger pulse ( % v + ) minimum pulse width (ns) t a = 25 c v + = 5v v + =12v v + = 2v
ald7555/ALD7556 advanced linear devices 6 of 12 typical applications (each timer) typical performance characteristics (cont'd) astable mode operation 50% duty cycle 1 2 3 4 8 7 6 5 r c 0.1 f frequency f = 1/ (1.4 r c ) v + v + astable mode operation (free running oscillator) monostable mode operation (one shot pulse) pulse delay t d = 1.1 r c 1 2 3 4 8 7 6 5 c 0.1 f r a v + v + r b frequency f = 1.46 / (r a + 2r b )c duty cycle dc = r b / (r a + 2r b ) trigger input delayed pulse output 1 2 3 4 8 7 6 5 0.1 f c r reset v + output sink current (ma) output sink current as a function of output voltage output voltage (v) 0.01 0.02 0.05 0.1 1.0 0.5 0.2 100 50 20 5.0 2.0 1.0 0.5 0.2 0.1 10 v + = 12v v + = 2v t a = 25 c v + = 5v output source current as a function of output voltage -1.0 -2.0 -5.0 -10 -20 -50 -100 -0.5 -0.5 -0.2 -0.1 -0.05 -0.02 -0.01 -0.2 -0.1 -1.0 output voltage (v) (referenced to v + ) output source current (ma) v + = 2v v + = 5v v + = 12v
ald7555/ALD7556 advanced linear devices 7 of 12 8 pin plastic soic package soic-8 package drawing millimeters inches min max min max dim a a 1 b c d-8 e e h l s 1.75 0.25 0.45 0.25 5.00 4.05 6.30 0.937 8 0.50 0.053 0.004 0.014 0.007 0.185 0.140 0.224 0.024 0 0.010  0.069 0.010 0.018 0.010 0.196 0.160 0.248 0.037 8 0.020 1.27 bsc 0.050 bsc 1.35 0.10 0.35 0.18 4.69 3.50 5.70 0.60 0 0.25 ? l c h s (45 ) ? e a a 1 b d s (45 ) e
ald7555/ALD7556 advanced linear devices 8 of 12 millimeters inches min max min max dim a a 1 b c d-14 e e h l s 1.75 0.25 0.45 0.25 8.75 4.05  6.30 0.937 8 0.50 0.053 0.004 0.014 0.007 0.336 0.140  0.224 0.024 0 0.010  0.069 0.010 0.018 0.010 0.345 0.160  0.248 0.037 8 0.020 1.27 bsc 0.050 bsc 1.35 0.10 0.35 0.18 8.55 3.50 5.70 0.60 0 0.25 ? 14 pin plastic soic package soic-14 package drawing e d e a a 1 b s (45 ) l c h s (45 ) ?
ald7555/ALD7556 advanced linear devices 9 of 12 8 pin plastic dip package pdip-8 package drawing b 1 s b e e 1 d e a 2 a 1 a l c e 1 ? millimeters inches min max min max dim a a 1 a 2 b b 1 c d-8 e e 1 e e 1 l s-8 ? 3.81 0.38 1.27 0.89 0.38 0.20 9.40 5.59 7.62 2.29 7.37 2.79 1.02 0 5.08 1.27 2.03 1.65 0.51 0.30 11.68 7.11 8.26 2.79 7.87 3.81 2.03 15 0.105 0.015 0.050 0.035 0.015 0.008 0.370 0.220 0.300 0.090 0.290 0.110 0.040 0 0.200 0.050 0.080 0.065 0.020 0.012 0.460 0.280 0.325 0.110 0.310 0.150 0.080 15
ald7555/ALD7556 advanced linear devices 10 of 12 14 pin plastic dip package pdip-14 package drawing b 1 d s b e a 2 a 1 a l e e 1 c e 1 ? millimeters inches min max min max dim a a 1 a 2 b b 1 c d-14 e e 1 e e 1 l s-14 ? 3.81 0.38 1.27 0.89 0.38 0.20 17.27 5.59 7.62 2.29 7.37 2.79 1.02 0 5.08 1.27 2.03 1.65 0.51 0.30 19.30 7.11 8.26 2.79 7.87 3.81 2.03 15 0.105 0.015 0.050 0.035 0.015 0.008 0.680 0.220 0.300 0.090 0.290 0.110 0.040 0 0.200 0.050 0.080 0.065 0.020 0.012 0.760 0.280 0.325 0.110 0.310 0.150 0.080 15
ald7555/ALD7556 advanced linear devices 11 of 12 8 pin cerdip package cerdip-8 package drawing a a 1 b b 1 c d-8 e e 1 e e 1 l l 1 l 2 s ? 3.55 1.27 0.97 0.36 0.20 -- 5.59 7.73   3.81 3.18 0.38 -- 0 5.08 2.16 1.65 0.58 0.38 10.29 7.87 8.26 5.08 -- 1.78 2.49 15 millimeters inches min max min max dim 0.140 0.050 0.038 0.014 0.008 -- 0.220 0.290 0.150 0.125 0.015 -- 0 0.200 0.085 0.065 0.023 0.015 0.405 0.310 0.325 0.200 -- 0.070 0.098 15 2.54 bsc 7.62 bsc 0.100 bsc 0.300 bsc e e 1 c e 1 ? s b l d b 1 e a l 2 a 1 l 1
ald7555/ALD7556 advanced linear devices 12 of 12 e e 1 c e 1 ? d s b 1 e b l a l 2 a 1 l 1 a a 1 b b 1 c d-14 e e 1 e e 1 l l 1 l 2 s ? 3.55 1.27 0.97 0.36 0.20 -- 5.59 7.73   3.81 3.18 0.38 -- 0  5.08 2.16 1.65 0.58 0.38 19.94 7.87 8.26   5.08 -- 1.78 2.49 15 millimeters inches min max min max dim 0.140 0.050 0.038 0.014 0.008 -- 0.220 0.290   0.150 0.125 0.015 -- 0 0.200 0.085 0.065 0.023 0.015 0.785 0.310 0.325   0.200 -- 0.070 0.098 15 2.54 bsc 7.62 bsc 0.100 bsc 0.300 bsc 14 pin cerdip package cerdip-14 package drawing


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